Purdue University engineers have demonstrated a way to increase the security of transistors on a chip by building them out of a sheet-like material. The university is also taking the lead on a microelectronics education and workforce development project seen as critical to national security.
New Transistor Design Disguises Key Computer Chip Hardware from Hackers
By Kayla Wiles
WEST LAFAYETTE, Ind. — A hacker can reproduce a circuit on a chip by discovering what key transistors are doing in a circuit—but not if the transistor “type” is undetectable.
Purdue University engineers have demonstrated a way to disguise which transistor is which by building them out of a sheet-like material called black phosphorus. This built-in security measure would prevent hackers from getting enough information about the circuit to reverse engineer it.
The findings appear in a paper published Monday, December 7, 2020, in Nature Electronics.
Reverse engineering chips is a common practice—both for hackers and companies investigating intellectual property infringement. Researchers also are developing X-ray imaging techniques that wouldn’t require actually touching a chip to reverse engineer it.
The approach that Purdue researchers have demonstrated would increase security on a more fundamental level. How chip manufacturers choose to make this transistor design compatible with their processes would determine the availability of this level of security.
A chip computes using millions of transistors in a circuit. When a voltage is applied, two distinct types of transistors—an N type and a P type—perform a computation. Replicating the chip would begin with identifying these transistors.
“These two transistor types are key since they do different things in a circuit. They are at the heart of everything that happens on all our chips,” said Joerg Appenzeller, Purdue’s Barry M. and Patricia L. Epstein Professor of Electrical and Computer Engineering. “But because they are distinctly different, the right tools could clearly identify them—allowing you to go backwards, find out what each individual circuit component is doing, and then reproduce the chip.”
If these two transistor types appeared identical upon inspection, a hacker wouldn’t be able to reproduce a chip by reverse engineering the circuit.
Appenzeller’s team showed in their study that camouflaging the transistors by fabricating them from a material such as black phosphorus makes it impossible to know which transistor is which. When a voltage toggles the transistors’ type, they appear exactly the same to a hacker.
While camouflaging is already a security measure that chip manufacturers use, it is typically done at the circuit level and doesn’t attempt to obscure the functionality of individual transistors—leaving the chip potentially vulnerable to reverse engineering hacking techniques with the right tools.
The camouflaging method that Appenzeller’s team demonstrated would be building a security key into the transistors.
“Our approach would make N and P type transistors look the same on a fundamental level. You can’t really distinguish them without knowing the key,” said Peng Wu, a Purdue Ph.D. student of electrical and computer engineering who built and tested a prototype chip with black phosphorus-based transistors in the Birck Nanotechnology Center of Purdue’s Discovery Park.
Not even the chip manufacturer would be able to extract this key after the chip is produced.
“You could steal the chip, but you wouldn’t have the key,” Appenzeller said.
Current camouflaging techniques always require more transistors in order to hide what’s going on in the circuit. But hiding the transistor type using a material like black phosphorus—a material as thin as an atom—requires fewer transistors, taking up less space and power in addition to creating a better disguise, the researchers said.
The idea of obscuring the transistor type to protect chip intellectual property originally came from a theory by University of Notre Dame professor Sharon Hu and her collaborators. Typically, what gives N and P type transistors away is how they carry a current. N type transistors carry a current by transporting electrons, while P type transistors use the absence of electrons, called holes.
Black phosphorus is so thin, Appenzeller’s team realized, that it would enable electron and hole transport at a similar current level, making the two types of transistors appear more fundamentally the same, per Hu’s proposal.
Appenzeller’s team then experimentally demonstrated the camouflaging abilities of black phosphorus-based transistors. These transistors are also known to operate at the low voltages of a computer chip at room temperature, due to their smaller dead zone for electron transport, described as a small “band gap.”
But despite the advantages of black phosphorus, the chip manufacturing industry would more likely use a different material to achieve this camouflage effect.
“The industry is starting to consider ultrathin, 2D materials because they would allow more transistors to fit on a chip, making them more powerful. Black phosphorus is a little too volatile to be compatible with current processing techniques, but showing experimentally how a 2D material could work is a step toward figuring out how to implement this security measure,” Appenzeller said.
The work is funded by the Indiana Innovation Institute and the Lilly Endowment, Inc.
Kayla Wiles is an engineering sciences writer for Purdue University News. The article was released on December 7, 2020.
Two-Dimensional Transistors with Reconfigurable Polarities for Secure Circuits Peng Wu, Dayane Reis, Xiaobo Sharon Hu and Joerg Appenzeller DOI: 10.1038/s41928-020-00511-7 Security is a critical aspect in modern circuit design, but research into hardware security at the device level is rare as it requires modification of existing technology nodes. With the increasing challenges facing the semiconductor industry, interest in out-of-the-box security solutions has grown, even if this implies introducing novel materials, such as two-dimensional (2D) layered semiconductors. Here, we show that high-performance, low-voltage 2D black phosphorus field-effect transistors (FETs) that have reconfigurable polarities are suitable for hardware security applications. The transistors can be dynamically switched between p-FET and n-FET operation through electrostatic gating, and achieve on-off ratios of 105 and subthreshold swings of 72 mV/decade at room temperature. Using the transistors, we create inverters that exhibit gains of 33.3 and are fully functional at VDD=0.2V. We also create a security primitive circuit with polymorphic NAND/NOR obfuscation functionality with sub-1V operation voltages; the robustness of the polymorphic gate against power supply variations is tested using Monte Carlo simulations.
Two-Dimensional Transistors with Reconfigurable Polarities for Secure Circuits
Peng Wu, Dayane Reis, Xiaobo Sharon Hu and Joerg Appenzeller
Security is a critical aspect in modern circuit design, but research into hardware security at the device level is rare as it requires modification of existing technology nodes. With the increasing challenges facing the semiconductor industry, interest in out-of-the-box security solutions has grown, even if this implies introducing novel materials, such as two-dimensional (2D) layered semiconductors.
Here, we show that high-performance, low-voltage 2D black phosphorus field-effect transistors (FETs) that have reconfigurable polarities are suitable for hardware security applications. The transistors can be dynamically switched between p-FET and n-FET operation through electrostatic gating, and achieve on-off ratios of 105 and subthreshold swings of 72 mV/decade at room temperature. Using the transistors, we create inverters that exhibit gains of 33.3 and are fully functional at VDD=0.2V.
We also create a security primitive circuit with polymorphic NAND/NOR obfuscation functionality with sub-1V operation voltages; the robustness of the polymorphic gate against power supply variations is tested using Monte Carlo simulations.
Purdue to Lead National Workforce Development Project on Trusted Microelectronics
By Steve Tally
WEST LAFAYETTE, Ind.—On October 20, 2020, Purdue University announced that it will lead a national initiative sponsored by the Office of the Secretary of Defense to address the urgent need for engineering graduates to develop defense technologies, especially in the area of microelectronics.
The Scalable Asymmetric Lifecycle Engagement Microelectronics Workforce Development program (SCALE) is a $19.2 million multi-university, public-private-academic partnership that will be used for workforce development across engineering universities across the nation.
“A skilled technical microelectronics workforce is required to ensure success of DoD [Department of Defense] modernization initiatives,” said Michael Kratsios, then the acting undersecretary of defense for research and engineering and chief technology officer of the United States.
“The workforce development program will be scalable to be used by any interested higher education institution,” said Mark Lewis, then the acting deputy undersecretary of defense for research and engineering. “The program will be conducted in partnership with the Naval Surface Warfare Center Crane Division as a nationally coordinated network of government, industry, and university partners, regionally executed. The goal is to create an asymmetric workforce advantage in microelectronics.”
The United States once held a global advantage in microelectronics manufacturing. But in 2020, due to industry consolidation, only four companies maintained semiconductor fabrication capabilities at 14 nanometers and below. These are the U.S.-based Intel Corp.; the Taiwan-based Taiwan Semiconductor Manufacturing Co. (TSMC); the South Korea-based Samsung; and the U.S.-based (but Abu Dhabi-owned) GlobalFoundries.
Alison Smith, education and workforce development co-lead of the trusted and assured microelectronics program at the Naval Surface Warfare Center Crane Division, said that the defense industries must compete for these interdisciplinary skill sets. The disciplines needed are those that companies in the United States report as the most difficult positions to fill.
“The issue is multifold,” she said. “Those of us working in national defense technologies have to compete with these thousands of companies that need the same skill sets. Some of our needed skill sets are not currently taught in traditional curricula, and these positions are the hardest to fill because the demand is so much greater than the supply. We also have the additional difficulty of only recruiting domestic students. We need both a trained and a clearable workforce. Moreover, the difficulty is compounded for engineers with expertise in cutting-edge microelectronics.”
While the field of microelectronics is reshaping the semiconductor industry — and as the leading edge of advanced technologies has moved to seven nanometers — devices used in national security and defense require additional innovations to remain secure and operate in extreme environments.
Theresa Mayer, Purdue University executive vice president for research and partnerships, said secure and resilient microelectronic systems “underpin advanced technologies critical to national security, including artificial intelligence, hypersonics, advanced communications networks, autonomous systems and others. Cutting-edge education and research are at the heart of meeting these national security needs.”
At Purdue, the SCALE program, directed by Peter Bermel, associate professor of electrical and computer engineering, brings together faculty across the Purdue College of Engineering with faculty from 14 universities. It also brings them together with the Department of Defense, NASA, Department of Energy NNSA labs, and the defense industry, to create a microelectronics workforce focused on national security needs.
Universities across the nation will be involved in specific areas of microelectronics education and workforce development critical to national security, starting with radiation hardening of microelectronics; heterogeneous integration of electronics; and system-on-a-chip electronics.
Universities that will prepare students to work in radiation hardening of microelectronics will include Vanderbilt University (lead), the Air Force Institute of Technology, St. Louis University, Brigham Young University, Arizona State University, Georgia Institute of Technology, SUNY-Binghamton, Arizona State University, Indiana University, the University of Tennessee at Chattanooga, and New Mexico State University.
Schools that will focus on heterogeneous integration of electronics include Purdue University (lead), Georgia Institute of Technology, Binghamton University-State University of New York, and Arizona State University.
Universities involved with system-on-a-chip electronics include Ohio State University (lead); Georgia Institute of Technology; Purdue University, and the University of California, Berkeley.
“Today’s engineering students are energized by the grand challenges facing the nation,” said Mark Lundstrom, acting dean of the Purdue College of Engineering and the Don and Carol Scifres Distinguished Professor of Electrical and Computer Engineering. “To create this urgently needed U.S. workforce for microelectronics, SCALE partners will work with students across the nation to build strong relationships with government and the defense industrial base, and to develop the new technologies needed for secure and resilient microelectronics.”
Steve Tally is a writer for Purdue University News Service. The article was released on October 20, 2020.